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启动流程：启动阶段1
1：start_code:切换CPU到SVC32模式
2：#ifdefCONFIG_S3C24X0
/*turn off the watchdog */
关闭看门狗和中断，配置系统时钟
3：#ifndefCONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit /*关闭MMU和内存*/
4：/*****************CHECK_CODE_POSITION
判断代码是从nandflash启动还是norflash启动，nandflash启动方式要多做一步工作：将代码从nandflash里拷贝到内存里，而nandflash只有前4KB的uboot拷贝到内存里了。
5：beq stack_setup /*内容相同跳到stack_setup，初始化堆栈*/
bne go_next
6：/* Set up the stack 初始化堆栈*/
stack_setup:
ldrr0, _TEXT_BASE/* upper 128 KiB: relocated uboot */
7：clear_bss:
ldr r0, _bss_start清除bss段
8： ldr pc,_start_armboot /*绝对跳转，跳到board.c里执行板子上的外设的初始化*/
/** armboot - Startup Code for ARM920 CPU-core** Copyright (c) 2001Marius Gr鰃er <mag@sysgo.de>* Copyright (c) 2002Alex Z黳ke <azu@sysgo.de>* Copyright (c) 2002Gary Jennejohn <garyj@denx.de>** See file CREDITS for list of people who contributed to this* project.** This program is free software; you can redistribute it and/or* modify it under the terms of the GNU General Public License as* published by the Free Software Foundation; either version 2 of* the License, or (at your option) any later version.** This program is distributed in the hope that it will be useful,* but WITHOUT ANY WARRANTY; without even the implied warranty of* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the* GNU General Public License for more details.** You should have received a copy of the GNU General Public License* along with this program; if not, write to the Free Software* Foundation, Inc., 59 Temple Place, Suite 330, Boston,* MA 02111-1307 USA*/#include <common.h>#include <config.h>/**************************************************************************** Jump vector table as in table 3.1 in [1]***************************************************************************/.globl _start_start:bstart_code/*跳到标号处*/ldrpc, _undefined_instructionldrpc, _software_interruptldrpc, _prefetch_abortldrpc, _data_abortldrpc, _not_usedldrpc, _irqldrpc, _fiq_undefined_instruction:.word undefined_instruction_software_interrupt:.word software_interrupt_prefetch_abort:.word prefetch_abort_data_abort:.word data_abort_not_used:.word not_used_irq:.word irq_fiq:.word fiq.balignl 16,0xdeadbeef /*定义了一个4字节数据，此处地址是(8+7)*4=60=0x3Cbalignl 16表示16字节对其*//**************************************************************************** Startup Code (called from the ARM reset exception vector)** do important init only if we don't start from memory!* relocate armboot to ram* setup stack* jump to second stage***************************************************************************//*汇编语言中所有定义的标号指的都是绝对地址, 对标号的引用也就是绝对地址的引用.*/_TEXT_BASE:/*定义了一个标号，这个标号处用来*/.wordTEXT_BASE.globl _armboot_start_armboot_start:.word _start /*这个是程序运行起始地址0x0000 0000 在39行定义了*//** These are defined in the board-specific linker script.*/.globl _bss_start_bss_start:.word __bss_start.globl _bss_end_bss_end:.word _end#ifdef CONFIG_USE_IRQ/* IRQ stack memory (calculated at run-time) */.globl IRQ_STACK_STARTIRQ_STACK_START:.word0x0badc0de/* IRQ stack memory (calculated at run-time) */.globl FIQ_STACK_STARTFIQ_STACK_START:.word 0x0badc0de#endif/** the actual start code*/start_code:/** set the cpu to SVC32 mode*/mrsr0, cpsrbicr0, r0, #0x1forrr0, r0, #0xd3msrcpsr, r0/*blcoloured_LED_initblred_LED_on*/#ifdef CONFIG_SMDK2440_LEDbl LED_on#endif#ifdefined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)/** relocate exception table*/ldrr0, =_startldrr1, =0x0movr2, #16copyex:subsr2, r2, #1ldrr3, [r0], #4strr3, [r1], #4bnecopyex#endif#ifdef CONFIG_S3C24X0/* turn off the watchdog */# if defined(CONFIG_S3C2400)# define pWTCON0x15300000# define INTMSK0x14400008/* Interupt-Controller base addresses */# define CLKDIVN0x14800014/* clock divisor register */#else# define pWTCON0x53000000# define INTMSK0x4A000008/* Interupt-Controller base addresses */# define INTSUBMSK0x4A00001C# define CLKDIVN0x4C000014/* clock divisor register */# endif#define CLK_CTL_BASE0x4C000000/* Hanson */#define MDIV_4050x7f << 12/* Hanson */#define PSDIV_4050x21/* Hanson */#define MDIV_2000xa1 << 12/* Hanson */#define PSDIV_2000x31/* Hanson */ldrr0, =pWTCONmovr1, #0x0strr1, [r0]/** mask all IRQs by setting all bits in the INTMR - default*/movr1, #0xffffffffldrr0, =INTMSKstrr1, [r0]# if defined(CONFIG_S3C2410)ldrr1, =0x3ffldrr0, =INTSUBMSKstrr1, [r0]# endif#if defined(CONFIG_S3C2440)ldrr1, =0x7fffldrr0, =INTSUBMSKstrr1, [r0]#endif#if defined(CONFIG_S3C2440)/* FCLK:HCLK:PCLK = 1:4:8 */ldrr0, =CLKDIVNmovr1, #5strr1, [r0]mrcp15, 0, r1, c1, c0, 0orrr1, r1, #0xc0000000mcrp15, 0, r1, c1, c0, 0movr1, #CLK_CTL_BASEmovr2, #MDIV_405addr2, r2, #PSDIV_405strr2, [r1, #0x04]/* MPLLCON tekkaman */#else/* FCLK:HCLK:PCLK = 1:2:4 *//* default FCLK is 120 MHz ! */ldrr0, =CLKDIVNmovr1, #3strr1, [r0]mrcp15, 0, r1, c1, c0, 0orrr1, r1, #0xc0000000mcrp15, 0, r1, c1, c0, 0/*write ctrl register tekkaman*/movr1, #CLK_CTL_BASE/* tekkaman*/movr2, #MDIV_200addr2, r2, #PSDIV_200strr2, [r1, #0x04]#endif#endif/* CONFIG_S3C24X0 *//** we do sys-critical inits only at reboot,* not when booting from ram!*/#ifndef CONFIG_SKIP_LOWLEVEL_INITblcpu_init_crit /*关闭MMU和内存*/#endif/***************** CHECK_CODE_POSITION ******************************************/adrr0, _start/* r0 <- current position of code */ldrr1, _TEXT_BASE/* test if we run from flash or RAM */cmpr0, r1/* don't reloc during debug */beqstack_setup/***************** CHECK_CODE_POSITION ******************************************//***************** CHECK_BOOT_FLASH ******************************************/ldrr1, =( (4<<28)|(3<<4)|(3<<2) )/* address of Internal SRAM 0x4000003C*/movr0, #0/* r0 = 0 */strr0, [r1]movr1, #0x3c/* address of men 0x0000003C*/ldrr0, [r1]cmpr0, #0bnerelocate/*代码是从norflash启动的，跳到noflash代码，并且是有去无回*//* recovery */ldrr0, =(0xdeadbeef)ldrr1, =( (4<<28)|(3<<4)|(3<<2) )strr0, [r1]/***************** CHECK_BOOT_FLASH ******************************************//***************** NAND_BOOT *************************************************//*否则代码是从nandflash启动的*/#define LENGTH_UBOOT 0x60000#define NAND_CTL_BASE 0x4E000000#ifdef CONFIG_S3C2440/* Offset */#define oNFCONF 0x00#define oNFCONT 0x04#define oNFCMD 0x08#define oNFSTAT 0x20/*nandflash控制器*//@ reset NANDmovr1, #NAND_CTL_BASEldrr2, =( (7<<12)|(7<<8)|(7<<4)|(0<<0) )strr2, [r1, #oNFCONF]ldrr2, [r1, #oNFCONF]ldrr2, =( (1<<4)|(0<<1)|(1<<0) )@ Active low CE Control strr2, [r1, #oNFCONT]ldrr2, [r1, #oNFCONT]ldrr2, =(0x6)@ RnB Clearstrr2, [r1, #oNFSTAT]ldrr2, [r1, #oNFSTAT]movr2, #0xff@ RESET commandstrbr2, [r1, #oNFCMD]movr3, #0@ waitnand1: addr3, r3, #0x1cmpr3, #0xabltnand1nand2:ldrr2, [r1, #oNFSTAT]@ wait readytstr2, #0x4beqnand2ldrr2, [r1, #oNFCONT]orrr2, r2, #0x2@ Flash Memory Chip Disablestrr2, [r1, #oNFCONT]@ get read to call C functions (for nand_read())ldrsp, DW_STACK_START@ setup stack pointermovfp, #0@ no previous frame, so fp=0@ copy U-Boot to RAMldrr0, =TEXT_BASE /*nand_read_ll函数的三个参数*/movr1, #0x0movr2, #LENGTH_UBOOTblnand_read_ll/*将nandflash里的代码拷贝到内存里*/tstr0, #0x0/*nand_read_l函数的返回值是否是0*/beqok_nand_read /*nand_read_l函数成功返回，又有去无回*/bad_nand_read:loop2:bloop2@ infinite loopok_nand_read:@ verifymovr0, #0ldrr1, =TEXT_BASEmovr2, #0x400@ 4 bytes * 1024 = 4K-bytesgo_next: /*核对内部SRAM中的4K程序，和从Nand中拷贝到SDRAM的前4K程序是否一致，如果不一致会进入死循环*/ldrr3, [r0], #4ldrr4, [r1], #4teqr3, r4bnenotmatchsubsr2, r2, #4beqstack_setup /*内容相同跳到stack_setup*/bnego_nextnotmatch:loop3:bloop3@ infinite loop#endif#ifdefCONFIG_S3C2410/* Offset */#define oNFCONF 0x00#define oNFCMD 0x04#define oNFSTAT 0x10@ reset NANDmovr1, #NAND_CTL_BASEldrr2, =0xf830@ initial valuestrr2, [r1, #oNFCONF]ldrr2, [r1, #oNFCONF]bicr2, r2, #0x800@ enable chipstrr2, [r1, #oNFCONF]movr2, #0xff@ RESET commandstrbr2, [r1, #oNFCMD]movr3, #0@ waitnand1:addr3, r3, #0x1cmpr3, #0xabltnand1nand2:ldrr2, [r1, #oNFSTAT]@ wait readytstr2, #0x1beqnand2ldrr2, [r1, #oNFCONF]orrr2, r2, #0x800@ disable chipstrr2, [r1, #oNFCONF]@ get read to call C functions (for nand_read())ldrsp, DW_STACK_START@ setup stack pointermovfp, #0@ no previous frame, so fp=0@ copy U-Boot to RAMldrr0, =TEXT_BASEmovr1, #0x0movr2, #LENGTH_UBOOTblnand_read_lltstr0, #0x0beqok_nand_readbad_nand_read:loop2:bloop2@ infinite loopok_nand_read:@ verifymovr0, #0ldrr1, =TEXT_BASEmovr2, #0x400@ 4 bytes * 1024 = 4K-bytesgo_next:ldrr3, [r0], #4ldrr4, [r1], #4teqr3, r4bnenotmatchsubsr2, r2, #4beqstack_setupbnego_nextnotmatch:loop3:bloop3@ infinite loop#endif/***************** NAND_BOOT *************************************************//***************** NOR_BOOT *************************************************/relocate:/* relocate U-Boot to RAM *//*********** CHECK_FOR_MAGIC_NUMBER***************/ldrr1, =(0xdeadbeef)cmpr0, r1bneloop3/*********** CHECK_FOR_MAGIC_NUMBER***************/adrr0, _start/* r0 <- current position of code */ldrr1, _TEXT_BASE/* test if we run from flash or RAM */ldrr2, _armboot_startldrr3, _bss_startsubr2, r3, r2/* r2 <- size of armboot */addr2, r0, r2/* r2 <- source end address */copy_loop:ldmiar0!, {r3-r10}/* copy from source address [r0] */stmiar1!, {r3-r10}/* copy to target address [r1] */cmpr0, r2/* until source end addreee [r2] */blecopy_loop/***************** NOR_BOOT *************************************************//* Set up the stack */stack_setup:ldrr0, _TEXT_BASE/* upper 128 KiB: relocated uboot */subr0, r0, #CONFIG_SYS_MALLOC_LEN/* malloc area */subr0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */#ifdef CONFIG_USE_IRQsubr0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)#endifsubsp, r0, #12/* leave 3 words for abort-stack */clear_bss:ldrr0, _bss_start/* find start of bss segment */ldrr1, _bss_end/* stop here */movr2, #0x00000000/* clear */clbss_l:strr2, [r0]/* clear loop...*/addr0, r0, #4cmpr0, r1bleclbss_lldrpc, _start_armboot#if defined(CONFIG_MINI2440_LED)#define GPIO_CTL_BASE 0x56000000#define oGPIO_B 0x10#define oGPIO_CON 0x0/* R/W, Configures the pins of the port */#define oGPIO_DAT 0x4#define oGPIO_UP 0x8/* R/W, Pull-up disable register */movr1, #GPIO_CTL_BASEaddr1, r1, #oGPIO_Bldrr2, =0x295551strr2, [r1, #oGPIO_CON]movr2, #0xffstrr2, [r1, #oGPIO_UP]ldrr2, =0x1c1strr2, [r1, #oGPIO_DAT]#endif_start_armboot:.word start_armboot /*跳到board.c里执行板子上的外设的初始化*/#define STACK_BASE 0x33f00000#define STACK_SIZE 0x10000.align2DW_STACK_START:.wordSTACK_BASE+STACK_SIZE-4 /**************************************************************************** CPU_init_critical registers** setup important registers* setup memory timing***************************************************************************/#ifndef CONFIG_SKIP_LOWLEVEL_INITcpu_init_crit:/** flush v4 I/D caches*/movr0, #0mcrp15, 0, r0, c7, c7, 0/* flush v3/v4 cache */mcrp15, 0, r0, c8, c7, 0/* flush v4 TLB *//** disable MMU stuff and caches*/mrcp15, 0, r0, c1, c0, 0bicr0, r0, #0x00002300@ clear bits 13, 9:8 (--V- --RS)bicr0, r0, #0x00000087@ clear bits 7, 2:0 (B--- -CAM)orrr0, r0, #0x00000002@ set bit 2 (A) Alignorrr0, r0, #0x00001000@ set bit 12 (I) I-Cachemcrp15, 0, r0, c1, c0, 0/** before relocating, we have to setup RAM timing* because memory timing is board-dependend, you will* find a lowlevel_init.S in your board directory.*/movip, lrbllowlevel_init /*跳到/board/samung/arm920t初始化内存*/movlr, ipmovpc, lr#endif /* CONFIG_SKIP_LOWLEVEL_INIT *//**************************************************************************** Interrupt handling***************************************************************************/@@ IRQ stack frame.@#define S_FRAME_SIZE72#define S_OLD_R068#define S_PSR64#define S_PC60#define S_LR56#define S_SP52#define S_IP48#define S_FP44#define S_R1040#define S_R936#define S_R832#define S_R728#define S_R624#define S_R520#define S_R416#define S_R312#define S_R28#define S_R14#define S_R00#define MODE_SVC0x13#define I_BIT0x80/** use bad_save_user_regs for abort/prefetch/undef/swi ...* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling*/.macrobad_save_user_regssubsp, sp, #S_FRAME_SIZEstmiasp, {r0 - r12}@ Calling r0-r12ldrr2, _armboot_startsubr2, r2, #(CONFIG_STACKSIZE)subr2, r2, #(CONFIG_SYS_MALLOC_LEN)/* set base 2 words into abort stack */subr2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)ldmiar2, {r2 - r3}@ get pc, cpsraddr0, sp, #S_FRAME_SIZE@ restore sp_SVCaddr5, sp, #S_SPmovr1, lrstmiar5, {r0 - r3}@ save sp_SVC, lr_SVC, pc, cpsrmovr0, sp.endm.macroirq_save_user_regssubsp, sp, #S_FRAME_SIZEstmiasp, {r0 - r12}@ Calling r0-r12addr7, sp, #S_PCstmdbr7, {sp, lr}^@ Calling SP, LRstrlr, [r7, #0]@ Save calling PCmrsr6, spsrstrr6, [r7, #4]@ Save CPSRstrr0, [r7, #8]@ Save OLD_R0movr0, sp.endm.macroirq_restore_user_regsldmiasp, {r0 - lr}^@ Calling r0 - lrmovr0, r0ldrlr, [sp, #S_PC]@ Get PCaddsp, sp, #S_FRAME_SIZE/* return & move spsr_svc into cpsr */subspc, lr, #4.endm.macro get_bad_stackldrr13, _armboot_start@ setup our mode stacksubr13, r13, #(CONFIG_STACKSIZE)subr13, r13, #(CONFIG_SYS_MALLOC_LEN)/* reserve a couple spots in abort stack */subr13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8)strlr, [r13]@ save caller lr / spsrmrslr, spsrstrlr, [r13, #4]movr13, #MODE_SVC@ prepare SVC-Mode@ msrspsr_c, r13msrspsr, r13movlr, pcmovspc, lr.endm.macro get_irq_stack@ setup IRQ stackldrsp, IRQ_STACK_START.endm.macro get_fiq_stack@ setup FIQ stackldrsp, FIQ_STACK_START.endm/** exception handlers*/.align 5undefined_instruction:get_bad_stackbad_save_user_regsbldo_undefined_instruction.align5software_interrupt:get_bad_stackbad_save_user_regsbldo_software_interrupt.align5prefetch_abort:get_bad_stackbad_save_user_regsbldo_prefetch_abort.align5data_abort:get_bad_stackbad_save_user_regsbldo_data_abort.align5not_used:get_bad_stackbad_save_user_regsbldo_not_used#ifdef CONFIG_USE_IRQ.align5irq://Apollo +/*get_irq_stackirq_save_user_regsbldo_irqirq_restore_user_regs*//* use IRQ for USB and DMA */sub lr, lr, #4 @ the return addressldr sp, IRQ_STACK_START@ the stack for irqstmdb sp!, { r0-r12,lr }@ save registersldr lr, =int_return @ set the return addrldr pc, =IRQ_Handle @ call the isrint_return:ldmia sp!, { r0-r12,pc }^ @ return from interrupt//Apollo -.align5fiq:get_fiq_stack/* someone ought to write a more effiction fiq_save_user_regs */irq_save_user_regsbldo_fiqirq_restore_user_regs#else.align5irq:get_bad_stackbad_save_user_regsbldo_irq.align5fiq:get_bad_stackbad_save_user_regsbldo_fiq#endif#ifdef CONFIG_SMDK2440_LED/*Add LED test code. Hanson*/#define pGPBCON 0x56000010//Port B control#define pGPBDAT 0x56000014//Port B data#define pGPBUP0x56000018//Pull-up control BLED_on:ldrr0, =pGPBCONldrr1, =0x295551strr1, [r0]ldrr0, =pGPBUPmovr1, #0xFFstrr1, [r0]ldrr0, =pGPBDATldrr1, =0x11 @LED1,2,3,4 light on and Beep onstrr1, [r0]mov r2, #0x1000led_loop:sub r2, r2, #0x1cmpr2, #0x0bneled_loopldrr0, =pGPBDATldrr1, =0x1E0 @LED1,2,3,4 light off and Beep offstrr1, [r0]movpc, lr#endif
